So, if multiple processes execute FAA, is there any guarantee that this FAA instruction will be executed in a wait-free manner? What if processes that finish executing this instruction do not stop there but repeatedly try to execute it?
Can the hardware fetch&add instruction guarantee wait-free execution?
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An algorithm is wait-free if it does not contain retry loops or wait loops. Since
fetch_add()never fails (unlikecompare_exchange_weak()), the operation itself is suited for writing wait-free algorithms (as no retry loops are needed). Of course, whether an algorithm using thefetch_add()instruction actually is wait-free depends on the rest of the algorithm. As long asfetch_add()is supported as an instruction on your hardware, it is wait-free. Only if it is not supported, and has to be emulated via CAS loops or LL/CS, it is no longer wait-free, as those are not wait-free.