Just started using Makefile and I have been make a heavily use of the capability of overriding variables through args. But sometime I have to override three or more and becomes a little annoying.
So my question is: Does Make has a built-in functionality to source a plain text file and override some variable? (like we do with dotenv libraries)
The only way I was able to accomplish this is to create an internal IF/ELSE IF/ELSE block controlled by (for example) a variable named env. It works fine but I do feel it makes to whole Makefile unnecessarily bloated.
Thanks.
It's not really clear what you are looking for, but you can do something like adding this to the very end of your makefile:
Then if the file
local.mkexists it will be included and any variables in it will be in effect when the recipes are invoked (because they were set last).However, this will have problems if you've already used those variables in an immediate context previously. For example, if you have:
where
local.mkcontainsFOO = bar, this won't help becauseMYVARwas set to the value ofFOObefore the include file was referenced.Another option is to put the
includefirst, then be careful to always use?=instead of=so that variables preserve existing values:will work but if you forget and use
FOO = foothen your local variables won't be in effect.One other option, if you're worried about this, would be to use
overridein yourlocal.mk; if it containsoverride FOO = barthen the second method above (includefirst) will work even if you resetFOOinside the makefile that setting will be ignored. But, if you do this then you can't also override this value on the command line.One last option, if you don't want to change your makefile, is to use
-fon the make command line to load the local makefile. For example, runmake -f local.mk -f Makefileto loadlocal.mkfirst; this is the equivalent of (and has the same behavior as) adding theincludeat the start.