Using Indirect addressing I'm trying to copy the value 77H into RAM memory locations 50H to 55H. The issue I'm running into is a build error where it says FSR and INDF are not previously defined values. When I try to specify them as as symbols then I dont get the expected results. Instead off loading 77H to 50H-55H I get 77 in 00H and 55 in 04H. I'm using a PIC18F452 in the MPLAB X IDE for reference.
P.S. This is using MPLAB X IDE version 4.01 as directed by my school due to the mpasm assembler not being available in later versions
EDIT I tried correcting again based on comments. It completes the build now without error but its not storing in the memory locations 50H-55H like I want it to:
I tried correcting again based on your advise, its building without error now but there's nothing stored in any memory locations let alone 50H-55H
INCLUDE <P18F452.INC>
ORG 0x00 ; Define the start of the code at address 0x00
; Load value 77H into WREG
MOVLW 77H
; Load FSR0 register with the starting address (50H)
MOVLW 50H ; Load low byte of the address into WREG
MOVWF FSR0L ; Move WREG to FSR0L register
MOVLW 00H ; Load high byte of the address into WREG
MOVWF FSR0H ; Move WREG to FSR0H register
; Copy the value from WREG into RAM using register indirect addressing mode
MOVWF INDF0 ; Copy 77H to location 50H
INCF FSR0L,F ; Increment FSR0L to point to the next location (51H)
MOVWF INDF0 ; Copy 77H to location 51H
INCF FSR0L,F ; Increment FSR0L to point to the next location (52H)
MOVWF INDF0 ; Copy 77H to location 52H
INCF FSR0L,F ; Increment FSR0L to point to the next location (53H)
MOVWF INDF0 ; Copy 77H to location 53H
INCF FSR0L,F ; Increment FSR0L to point to the next location (54H)
MOVWF INDF0 ; Copy 77H to location 54H
INCF FSR0L,F ; Increment FSR0L to point to the next location (55H)
MOVWF INDF0 ; Copy 77H to location 55H
END
"
Original code: "
ORG 0x00 ; Define the start of the code at address 0x00
MOVLW 50H ; Load FSR with 50H
MOVWF FSR ; Set FSR to 50H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to memory location pointed by FSR (50H)
INCF FSR, F ; Increment FSR to point to 51H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to memory location pointed by FSR (51H)
INCF FSR, F ; Increment FSR to point to 52H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to memory location pointed by FSR (52H)
INCF FSR, F ; Increment FSR to point to 53H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to memory location pointed by FSR (53H)
INCF FSR, F ; Increment FSR to point to 54H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to memory location pointed by FSR (54H)
INCF FSR, F ; Increment FSR to point to 55H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to memory location pointed by FSR (55H)
END
How I tried to correct it:
ORG 0x00 ; Define the start of the code at address 0x00
FSR equ 0x04 ; Define FSR as a symbol representing address 0x04
INDF equ 0x00 ; Define INDF as a symbol representing address 0x00
MOVLW 50H ; Load WREG with 50H
MOVWF FSR ; Set FSR to 50H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to the memory location pointed by FSR (50H)
INCF FSR, F ; Increment FSR to point to 51H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to the memory location pointed by FSR (51H)
INCF FSR, F ; Increment FSR to point to 52H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to the memory location pointed by FSR (52H)
INCF FSR, F ; Increment FSR to point to 53H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to the memory location pointed by FSR (53H)
INCF FSR, F ; Increment FSR to point to 54H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to the memory location pointed by FSR (54H)
INCF FSR, F ; Increment FSR to point to 55H
MOVLW 77H ; Load WREG with 77H
MOVWF INDF ; Copy WREG (77H) to the memory location pointed by FSR (55H)
END
What my registers are reading: enter image description here
I need it to read 77H in memory locations 50H-55H and utilize indirect addressing.

You are not writing to FSR0L here:
RAM address you are writing to in "MOVWF FSR0L" instruction is a combination of: upper 4 bits (BSR << 8) and lower 8 bits (FSR0L & 0xFF). BSR is cleared after reset (POR, BOR) so you are writing to address 0x0E9 instead of 0xFE9.
SFRs are located in bank 15 and MPASM uses BSR (bank select register) by default when you omit RAM access bit in assembly instruction.
You can switch to bank 15 first:
or use access bank (RAM access bit a=0):
Check out MPASM assembler documentation: 33014j.pdf, page 251 table A.6