In Software Optimization Guide for the AMD Zen4 Microarchitecture, it is written that:
Write-combining is the merging of multiple memory write cycles that target locations within the address range of a write buffer.
To improve system performance, AMD Zen4 processors include a Write Combining Buffer (WCB) that consists of multiple 64-byte write buffers that are aligned to cache-line boundaries. The write buffers aggressively combine multiple memory-write cycles of any data size that address locations within 64-byte aligned regions. The processor continues to combine writes to this buffer without writing the data to the system, as long as certain rules apply (see Table 3 for more information). The data sizes can be bytes, words, doublewords, or quadwords.
However, for typical write-back memory, if the corresponding cacheline is valid in the cache, modifications will also occur within the cache and will not be directly written to the memory, which also "buffers store operation without writing the data to the system".
Is there any fundamental difference between the mechanism of write-combine memory and write-back memory?
What are the direct performance advantages of write-combine? Why is it more efficient in some case?