Decoding ARM7 machine language to ARM instruction

Question

Trying to decode:

1. 0x15882BCD
2. 0xC3A01B28

I keep on getting the LDMDAHS instruction, but I know that isn't right. Could someone help?

Answer 1

.inst 0x15882BCD
.inst 0xC3A01B28
.thumb
.inst 0x2BCD
.inst 0x1588
.inst 0x1B28
.inst 0xC3A0

arm-none-eabi-as so.s -o so.o
arm-none-eabi-objdump -D so.o

so.o:     file format elf32-littlearm


Disassembly of section .text:

00000000 <.text>:
   0:   15882bcd    strne   r2, [r8, #3021] ; 0xbcd
   4:   c3a01b28    movgt   r1, #40, 22 ; 0xa000
   8:   2bcd        cmp r3, #205    ; 0xcd
   a:   1588        asrs    r0, r1, #22
   c:   1b28        subs    r0, r5, r4
   e:   c3a0        stmia   r3!, {r5, r7}

does this resemble what you were looking for?

byteswapped

.inst 0xcd2b8815
.inst 0x281ba0c3
.thumb
.inst 0x8815
.inst 0xcd2b
.inst 0xa0c3
.inst 0x281b


00000000 <.text>:
   0:   cd2b8815    stcgt   8, cr8, [r11, #-84]!    ; 0xffffffac
   4:   281ba0c3    ldmdacs r11, {r0, r1, r6, r7, sp, pc}
   8:   8815        ldrh    r5, [r2, #0]
   a:   cd2b        ldmia   r5, {r0, r1, r3, r5}
   c:   a0c3        add r0, pc, #780    ; (adr r0, 31c <.text+0x31c>)
   e:   281b        cmp r0, #27

Note that depending on which version of binutils you might need to mess with .word, .hword, .inst.n, .inst.w wait that reminds me...

.thumb
.syntax unified
.inst.w 0x15882BCD
.inst.w 0xC3A01B28


Disassembly of section .text:

00000000 <.text>:
   0:   1588        asrs    r0, r1, #22
   2:   2bcd        cmp r3, #205    ; 0xcd
   4:   c3a0        stmia   r3!, {r5, r7}
   6:   1b28        subs    r0, r5, r4

Yes, those are not thumb2 instructions (distinct pattern) and they don't look like aarch32, but...

so.o:     file format elf64-littleaarch64


Disassembly of section .text:

0000000000000000 <.text>:
   0:   15882bcd    b   620af34 <.text+0x620af34>
   4:   c3a01b28    .inst   0xc3a01b28 ; undefined

I don't think its aarch64.