How to implement beq in alu using RISC-V?

Question

I try to use RISC-V to implement a ALU. After I googled, my implement of beq is

.globl  beq
.type   beq, @function
beq:
    lui a5,%hi(registers)
    addi t0,a5,%lo(registers)
    slli a0,a0,2
    slli a1,a1,2
    slli a2,a2,2
    add t1, t0, a0
    add t2, t0, a1
    add t3, t0, a2
    lw t1,0(t1)
    lw t2,0(t2)
    sub t4, t1, t2
    seqz t4, t4
    sw t4,0(t3)
    ret
.size   beq, .-beq

.globl  bne
.type   bne, @function
bne:
    lui a5,%hi(registers)
    addi t0,a5,%lo(registers)
    slli a0,a0,2
    slli a1,a1,2
    slli a2,a2,2
    add t1, t0, a0
    add t2, t0, a1
    add t3, t0, a2
    lw t1,0(t1)
    lw t2,0(t2)
    sub t4, t1, t2
    snez t4, t4
    sw t4,0(t3)
    ret
.size   bne, .-bne

The logic of beq and bne， I think they are the same, however, bne pass the test cases but beq not, I really don't know what's wrong about beq.

The implement or the logic of beq and bne are the same (probably?), but bne pass the test cases, but beq not, I wonder what's wrong about beq