Provide a minimal set of RISC-V instructions that may be used to implement the following pseudoinstruction:
not x5, x6 // bit-wise invert
solution:
xori x5, x6, -1
What does -1 in the solution of this code mean? Why is xor with -1 equivalent to a bitwise invert / not?
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Almost all computers these days (including all RISC-V variants) represent signed number in two's complement. What this means is that negative numbers will be represented by bit patterns with their upper bit(s) set, and larger (closer to 0) negative numbers will be represented by bit patterns with a larger numeric value. In particular, -1 will be the "largest" possible bit pattern (for any particular size), with all bits set to 1.
In RSIC-V, the 'immediate' instructions (those with the
isuffix such asxorihere) represent their immediate operand as a 12-bit signed two's complement number. This will then be sign-extended to the size of the instruction (have the upper-most bit replicated) to be used as the operand to the ALU.