Use case: I use many Makefiles that share some logic but differ notably in prerequisites, so I include a Common.mk file and use a PREREQ variable in all of them.
Problem: $(PREREQ) is correctly set but $^ is mysteriously empty
Reproduction:
Here is an example Common.mk
all: $(PREREQ)
echo $^
echo $(PREREQ)
A B:
and here is the Makefile
include Common.mk
PREREQ ?= A
Now here is the result of typing make at the prompt:
echo
echo A
A
I expected to have the same output but it's not the case.
Amusingly, if you type make PREREQ=B or if you switch the two lines in the Makefile, it works as expected and $^ is correctly set.
I use GNU Make 4.3.
Why $^ is empty in this case ?
This is just a guess but maybe with the ?= operator is the culprit. As it only assigns it after it checks that the variable PREREQ is empty.
Now when using
the variable is already assigned to PREREQ and does not require some sort of downtime I say to get the $^ auto variable.
Try running the example makefile with (granted I have version 4.4.1, and do not know if this option is available to you)
To me it output this:
Hope this helps