gcc:linker: set section size to 8 bytes

Question

I am running arm-none-eabi-objcopy -O verilog -S --reverse-bytes=4 --verilog-data-width 8 -R .comment --gap-fill 0 --pad-to 0x2000 bin/main.elf bin/main.verilog

To convert my code in a format suitable for loading in simulation memory via readmemh The generated hexfile has sections that are not multiple of 8 bytes resulting in the main.verilog containing

0000805800008068 0000230105FFFF01                                                                                                                                                                                                                                                                                                                                                             
04000008                                                                                                                                                                                                                                                                                                                                                                                      
@000002C4                                                                                                                                                                                                                                                                                                                                                                                     
000002D000002000 00000000                   

How do I ensure that instead of 04000008 the main.verilog file has 0000000004000008