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20
Devhide
2024-02-15T07:07:34.873000
122
Views
Stability Issues with Intrinsic Functions for RDMSR / WRMSR fixed by Switching to Assembly?
Published on
15 February 2024 at 07:07
#c++
#windows
#assembly
#x86-64
#msr
54
Views
perf stat -p pid does not work with PMU events
Published on
15 February 2024 at 00:53
#performance
#profiling
#perf
#energy
#msr
60
Views
Perf power consumption for a multi-socket system
Published on
03 February 2024 at 03:42
#performance
#intel
#perf
#energy
#msr
172
Views
How can I determine if my Intel CPU supports disabling prefetching through model specific registers?
Published on
24 October 2023 at 22:09
#x86
#cpu-architecture
#intel
#prefetch
#msr
135
Views
MCHBAR Base Address Register (MCHBAR_0_0_0_PCI) — Offset 48h
Published on
19 October 2023 at 11:36
#intel
#energy
#msr
78
Views
Why does GS segment selector value does not change after SWAPGS instruction? (windows kernel debugging)
Published on
30 August 2023 at 08:44
#debugging
#kernel
#windbg
#windows-kernel
#msr
273
Views
How can I identify the MSR (microsoft reserved partition) on a disk with an MBR partition style layout?
Published on
11 August 2023 at 11:49
#windows
#partition
#msr
107
Views
Converting rdpmc_reference_cycles to 64-bit in MASM
Published on
09 July 2023 at 11:39
#windows
#assembly
#x86-64
#masm
#msr
248
Views
How to read the content of ID_AA64MMFR1_EL1 register into the 64-bit variable using inline assembly?
Published on
31 May 2023 at 12:56
#assembly
#arm
#inline-assembly
#arm64
#msr
136
Views
Will memory write be visible after sending an IPI on x86?
Published on
28 May 2023 at 18:08
#assembly
#x86
#operating-system
#memory-barriers
#msr
18
Views
How can I monitor the events that cause the frequency of Intel CPU and Graphis to reduce, such as "Package/Platform-Level Power Limiting PL1 Status"
Published on
19 April 2023 at 09:58
#python
#gpu
#cpu
#intel
#msr
102
Views
Do any Intel RAPL measurements include the fan / cooling?
Published on
15 April 2023 at 22:52
#x86
#intel
#energy
#msr
107
Views
How to introduce an MSR in gem5 and integrate it with Linux kernel?
Published on
05 November 2022 at 01:20
#linux-kernel
#gem5
#msr
762
Views
MSR vs MMIO/PCIe configuration space
Published on
15 October 2022 at 18:50
#x86
#intel
#processor
#msr
172
Views
Is there a way to enable programmatically L1 L2 L3 caches using msr-tools on Linux?
Published on
23 September 2022 at 09:11
#linux
#intel
#cpu-registers
#cpu-cache
#msr
307
Views
x86 CPU Modes / Rings During Boot Process
Published on
16 September 2022 at 13:15
#x86
#x86-64
#privileges
#uefi
#msr
386
Views
Read PMU counters using wrmsrl and rdmsrl
Published on
09 May 2022 at 20:01
#c
#linux-kernel
#kernel-module
#intel-pmu
#msr
239
Views
wrmsr instruction causing triple fault in bootloader while trying to enable paging?
Published on
06 May 2022 at 01:07
#assembly
#x86-64
#virtualbox
#osdev
#msr
301
Views
Setting Package-Wide MSRs for Uncore Frequency and Cache Allocation Technology
Published on
23 March 2022 at 17:55
#x86
#x86-64
#intel
#cpu-architecture
#msr
1.2k
Views
How to download Slack history messages if you are not the app admin?
Published on
08 February 2022 at 13:37
#access-token
#slack
#msr
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