UVM RAL: NULL pointer is dereference

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I am a beginner in using UVM RAL. I am trying to access by DUT Registers using UVM_BACKDOOR. I think this should not require an adapter and a predictor. I maybe wrong thinking so.

Below is my code snippet:

class my_operations extends base_test;
    `uvm_component_utils(my_operations)

    `REG_BLOCK regmodel;

    task main_phase(uvm_phase phase)
        uvm_status_e    status;
        uvm_path_e      path = UVM_BACKDOOR;

        regmodel.MY_REG.MY_REG_SIGNAL.set(1'b1);
        regmodel.MY_REG.update(status, UVM_BACKDOOR);
        assert(status == UVM_IS_OK);   // <--- Error: NULL pointer dereference

    endtask // main_phase ends here

Please show me where am I wrong?

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newbie99 On

The `REG_BLOCK regmodel may also be defined in base class (base_test) . If base_test has a value assigned to regmodel then extending it and redefining will overwrite that value.

Removing that line will work.