I'm learning embedded linux on Zedboard using buildroot, so I'm relatively new to this. I don't understand how I can configure and interact with axi-gpio IPs from PS in the userspace. I already created a simple design that contains both PL and PS in Zynq, and the standalone version works fine. In embedded linux, however, although I add the device nodes in the device tree source, I don't see any new devices in /dev/ or /sys/class/ directory after booting. What is the problem?
I could bring up Linux with default configurations of Zedboard and could run a simple blinking LED application in PS (using gpiochip0 that is already available in /dev after booting). I also tested Ethernet with the default configurations. Now I want to try a simple design that uses both PL and PS in zynq. This is my design:
In Vivado I created an AND IP block in VHDL. It has two inputs that are directly connected to two input switches (SW0 and SW1) on the board. The output of the AND gate is connected to the PS through an AXI-GPIO_0 IP. Inside the PS I write a C code of a NOT logic and the output of the PS is connected to AXI-GPIO_1 IP which is then connected to an output LED. At the end, the overal logic will be a NAND gate: AND (PL) + NOT (PS).
I have tested this using standalone and it's working correctly. In embedded linux, however, I have encountered some issues that might be related to my limited knowledge of embedded linux:
1- In Buildroot, how can I enable the kernel to interact with axi-gpio blocks? If I'm not wrong, we must add the device nodes in the device tree source and then we can use the device drivers for axi-gpio controllers. I already did that and added two device nodes in dts file (buildroot/output/build/linux-custom/arch/arm/boot/dts/zynq-zed.dts). After that, I run make and the dtb will be updated, but after booting on the board, I don't see any new devices in /dev/ directory for axi-gpios. I only see the gpiochip0 is available and I can use it for the blinking LED application. Also in /sys/class/gpio/ I only see gpiochip0. I expect to find two other gpiochips for axi-gpios (gpiochip1 and gpiochip2). Is it right? If yes, what did I do wrong? If no, what should I expect and how can I work with axi-gpios in my design?
2- To create the Boot.bin file, in Vivado -> create boot image: I add 3 files: FSBL.elf as the bootloader, bitstream, and u-boot.elf (from buildroot). Then I replace the boot.bin file generated by Buildroot with the boot.bin file from Vivado. One problem is that when I use an FSBL that involves a design in PL, the Ethernet does not work! so I have to use an FSBL from Vivado that does not contain any PL modifications (in this case Ethernet is working as well).
p.s. I want to move to Yocto after this, but since it is more complicated, I prefer to finish this simple design in buildroot at first.
If there's anyone with expertise in Buildroot and Zedboard, I would greatly appreciate their assistance.
Thanks