Zynq UltraScale+ zcu3eg - coresight trace

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I'm using a Zynq UltraScale+ zcu3eg, with an ARM A53.

I'm having trouble configuring the coresight components like ETM, funnels, replicator, ETB, TMC, TPIU, CTI, etc to start tracing my code.

For example:
From the technical reference manual, the coreSight base address is 0xFE800000.
The Cortex-A53 0 ETM is at 0x00440000 address.
The ETM Software Lock Access Register has the offset 0xFB0.

Trying to change the value of this register by accessing the address directly or using mmap, I try this:

ptr = coreSight_base_addr + ETM_addr + register_offset
*ptr = 0xC5ACCE55.

The board restarts when accessing the address directly. Get the "bus error" message using mmap.

Can anyone help to find examples of code or material that could help me to make it work?

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