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20
13
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Substitution to DirectFB Library

Published on
#linux #xilinx #directfb
57
Views

VHDL Error - Washing Machine - unresolved signal is multiply driven

Published on
#vhdl #project #xilinx #vivado #vivado-hls
16
Views

Where do I find the Xilinx xc7z007sclg400-1 master constaint file?

Published on
#fpga #xilinx
43
Views

Can SYSCLK be included in FPGA Xilinx vivado testbenches?

Published on
#fpga #clock #xilinx #vivado #test-bench
48
Views

Are FPGA GPIOs capable enough to read bits at a high rate (26Mbps)? If not, what is a possible way?

Published on
#emulation #fpga #gpio #xilinx #vlsi
39
Views

u-boot stuck at starting kernel for zybo z7

Published on
#fpga #xilinx #u-boot #l4re
38
Views

embedded linux buildroot how to work with axi-gpio?

Published on
#embedded-linux #xilinx #buildroot #device-tree #zynq
49
Views

buildroot for zedboard, how to enable axi-gpio in device tree?

Published on
#embedded-linux #xilinx #buildroot #device-tree #zynq
14
Views

How to use High Clock Frequency using clock wizard (BuffPll) in xilinx for serial communication?

Published on
#clock #xilinx
65
Views

how to implement a Vhdl code for 2bit karatsuba algorithm

Published on
#vhdl #xilinx #karatsuba
61
Views

Zynq UltraScale+ zcu3eg - coresight trace

Published on
#c #arm #trace #xilinx #zynq
28
Views

AMD/Xilinx SystemVerilog class variables disappeared in sript vs. project simulation

Published on
#class #system-verilog #xilinx
126
Views

Timing closure problems in FIFO

Published on
#verilog #timing #xilinx #fifo #vivado
98
Views

Xilinx Vivado schematic for if else statements

Published on
#if-statement #system-verilog #xilinx #vivado #synthesis
72
Views

Isim not running

Published on
#xilinx #xilinx-ise
55
Views

CNN quantization using xilinx brevitas

Published on
#pytorch #conv-neural-network #xilinx #quantization
74
Views

How to enable PMU GIC Proxy on Xilinx ZCU102?

Published on
#interrupt #uart #xilinx
86
Views

How to trigger a software generated interrupt on core1 from core1 on bare metal?

Published on
#interrupt #xilinx #zynq #zynq-ultrascale+
112
Views

difference between Xilinx solarflare scaleout onlod, solarflare onload, and solarflare TCPDirect?

Published on
#xilinx #openonload
106
Views

xilinx uartps interrupt headler is not working (Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit)

Published on
#interrupt #uart #xilinx

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