I aim to design an 8-bit softcore processor that can be implemented on the Zedboard Zynq-7000 FPGA. What do you think I should do for validation, test and verification (what kind of testbench or assembly code)?
Test and Verification for Designed Softcore Chip
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As always, break it down. Make a testbench for your ALU, another for your registers, another for the program memory, and one for each peripheral. Then when you are happy with that create a big testbench that performs some integration tests. Depending on how serious you are you can simulate everything. But for mine I had some simple program running in the top level testbench. That is until I found something when running "for real" and then brought that down to minimal code and then simulated that. But as there are many things happening the simulation files may become huge and the simulation will be slooow. The file size may be shortened by not logging everything though.